PIC32MX3XX/4XX
15.0
INPUT CAPTURE
2.
Capture timer value on every edge (rising and
falling)
Note 1: This data sheet summarizes the features
of the PIC32MX3XX/4XX family of
devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to Section 15. “Input
Capture” (DS61122) of the “PIC32MX
Family Reference Manual” , which is
available from the Microchip web site
(www.microchip.com/PIC32).
2: Some registers and associated bits
described in this section may not be avail-
able on all devices. Refer to Section 4.0
sheet for device-specific register and bit
information.
The Input Capture module is useful in applications
requiring frequency (period) and pulse measurement.
The PIC32MX3XX/4XX devices support up to five input
capture channels.
The Input Capture module captures the 16-bit or 32-bit
value of the selected Time Base registers when an
event occurs at the ICx pin. The events that cause a
capture event are listed below in three categories:
3. Capture timer value on every edge (rising and
falling), specified edge first.
4. Prescaler Capture Event modes
- Capture timer value on every 4th rising edge
of input at ICx pin
- Capture timer value on every 16th rising
edge of input at ICx pin
Each input capture channel can select between one of
two 16-bit timers (Timer2 or Timer3) for the time base,
or two 16-bit timers (Timer2 and Timer3) together to
form a 32-bit timer. The selected timer can use either
an internal or external clock.
Other operational features include:
? Device wake-up from capture pin during CPU
Sleep and Idle modes
? Interrupt on input capture event
? 4-word FIFO buffer for capture values
- Interrupt optionally generated after 1, 2, 3 or
4 buffer locations are filled
? Input capture can also be used to provide
additional sources of external interrupts
1.
Simple Capture Event modes
- Capture timer value on every falling edge of
input at ICx pin
- Capture timer value on every rising edge of
input at ICx pin
FIGURE 15-1:
INPUT CAPTURE BLOCK DIAGRAM
ICx Input
Prescaler
1, 4, 16
Edge Detect
ICTMR
C32
FIFO Control
ICxBUF<31:16>
Timer3
0
ICxBUF<15:0>
Timer2
1
ICM<2:0>
ICM<2:0>
FEDGE
ICBNE
ICOV
Interrupt
ICxCON
ICI<1:0>
Event
Generation
Data Space Interface
? 2010 Microchip Technology Inc.
Interrupt
Peripheral Data Bus
DS61143G-page 107
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